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 ISP1102
Advanced Universal Serial Bus transceiver
Rev. 03 -- 02 September 2003 Product data
1. General description
The ISP1102 Universal Serial Bus (USB) transceiver is fully compliant with the Universal Serial Bus Specification Rev. 2.0. The ISP1102 can transmit and receive USB data at full-speed (12 Mbit/s). The transceiver allows USB Application Specific ICs (ASICs) and Programmable Logic Devices (PLDs) with power supply voltages from 1.65 to 3.6 V to interface with the physical layer of the USB. The transceiver has an integrated 5 V-to-3.3 V voltage regulator for direct powering via the USB supply line VBUS. The transceiver has an integrated voltage detector to detect the presence of the VBUS voltage (VCC(5.0)). When VCC(5.0) or Vreg(3.3) is lost, the D+ and D- pins can be shared with other serial protocols. The transceiver is a bi-directional differential interface and is available in HBCC16 and HVQFN14 packages. The transceiver is ideal for use in portable electronic devices, such as mobile phones, digital still cameras, personal digital assistants and information appliances.
2. Features
s s s s s s s s s s s s s Complies with Universal Serial Bus Specification Rev. 2.0 Supports data transfer at full-speed (12 Mbit/s) Integrated 5 V-to-3.3 V voltage regulator for powering via USB line VBUS VBUS voltage presence indication on pin VBUSDET VP and VM pins function in bi-directional mode allowing pin count saving for ASIC interface Used as USB device transceiver or USB host transceiver Stable RCV output during single-ended zero (SE0) condition Two single-ended receivers with hysteresis Low-power operation Supports I/O voltage range from 1.65 to 3.6 V 12 kV ESD protection (ISP1102W) at D+, D-, VCC(5.0) and GND pins Full industrial operating temperature range from -40 to +85 C Available in HBCC16 and HVQFN14 lead-free and halogen-free packages.
Philips Semiconductors
ISP1102
Advanced USB transceiver
3. Applications
s Portable electronic devices, such as: x Mobile phone x Digital Still Camera (DSC) x Personal Digital Assistant (PDA) x Information Appliance (IA).
4. Ordering information
Table 1: Ordering information Package Name ISP1102W ISP1102BS HBCC16 HVQFN14 Description plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm plastic thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 2.5 x 0.85 mm Version SOT639-2 SOT773-1 Type number
5. Block diagram
3.3 V V CC(I/O)
VOLTAGE REGULATOR
VCC(5.0) Vreg(3.3) Vpu(3.3) 1.5 k D+ 33 (1%)
VBUSDET SOFTCON OE RCV VP/VPO VM/VMO SUSPND LEVEL SHIFTER
D- 33 (1%)
ISP1102
GND
004aaa207
Fig 1. Block diagram.
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Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
6. Pinning information
6.1 Pinning
VBUSDET SUSPND
VM/VMO VBUSDET SUSPND
n.c.
VCC(I/O)
5
6
7
8
9
D-
4
5
VCC(I/O)
6
7
VM/VMO VP/VPO RCV
4
10
D+ n.c. n.c.
VP/VPO 3
8 D-
ISP1102W
3 2 GND
(exposed diepad)
11 12
ISP1102BS
RCV 2 GND OE 1
(exposed diepad)
9 D+ 10 n.c.
OE
1
16 SOFTCON
15 Vpu(3.3)
14 VCC(5.0)
13
Vreg(3.3)
14
SOFTCON
13
Vpu(3.3)
12
VCC(5.0)
11
Vreg(3.3)
Bottom view
004aaa209
004aaa208
Bottom view
Fig 2. Pin configuration HBCC16.
Fig 3. Pin configuration HVQFN14.
6.2 Pin description
Table 2: Symbol[1] OE Pin description Pin HBCC16 1 HVQFN14 1 I input for output enable (CMOS level with respect to VCC(I/O), active LOW); enables the transceiver to transmit data on the USB bus input pad; push pull; CMOS RCV 2 2 O differential data receiver output (CMOS level with respect to VCC(I/O)); driven LOW when input SUSPND is HIGH; the output state of RCV is preserved and stable during an SE0 condition output pad; push pull; 4 mA output drive; CMOS VP/VPO 3 3 I/O single-ended D+ receiver output VP (CMOS level with respect to VCC(I/O)); for external detection of SE0, error conditions, speed of connected device; this pin also acts as the drive data input VPO; see Table 3 and Table 4 bidirectional pad; push-pull input; three-state output; 4 mA output drive; CMOS VM/VMO 4 4 I/O single-ended D- receiver output VM (CMOS level with respect to VCC(I/O)); for external detection of SE0, error conditions, speed of connected device; this pin also acts as the drive data input VMO; see Table 3 and Table 4 bidirectional pad; push-pull input; three-state output; 4 mA output drive; CMOS SUSPND 5 5 I suspend input (CMOS level with respect to VCC(I/O)); a HIGH level enables low-power state while the USB bus is inactive and drives output RCV to a LOW level input pad; push pull; CMOS
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Type
Description
Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
Table 2: Symbol[1] n.c. VCC(I/O)
Pin description...continued Pin HBCC16 6 7 HVQFN14 6 not connected supply voltage for digital I/O pins (1.65 to 3.6 V). When VCC(I/O) is not connected, the D+ and D- pins are in three-state. This supply pin is totally independent of VCC(5.0) and Vreg(3.3) and must never exceed the Vreg(3.3) voltage. VBUS indicator output (CMOS level with respect to VCC(I/O)); when VBUS > 4.1 V, then VBUSDET = HIGH and when VBUS < 3.6 V, then VBUSDET = LOW; when SUSPND = HIGH, then pin VBUSDET is pulled HIGH output pad; push pull; 4 mA output drive; CMOS negative USB data bus connection (analog, differential) positive USB data bus connection (analog, differential) not connected not connected not connected internal regulator option: regulated supply voltage output (3.0 to 3.6 V) during 5 V operation; a decoupling capacitor of at least 0.1 F is required regulator bypass option: used as a supply voltage input (3.3 V 10%) for 3.3 V operation Type Description
VBUSDET
8
7
O
D- D+ n.c. n.c. n.c. Vreg(3.3)
9 10 11 12 13
8 9 10 11
AI/O AI/O
VCC(5.0)
14
12
-
internal regulator option: supply voltage input (4.0 to 5.5 V); can be connected directly to USB line VBUS regulator bypass option: connect to Vreg(3.3) pull-up supply voltage (3.3 V 10%); connect an external 1.5 k resistor on D+ (full-speed). Pin function is controlled by input SOFTCON: SOFTCON = LOW -- Vpu(3.3) floating (high impedance); ensures zero pull-up current SOFTCON = HIGH -- Vpu(3.3) = 3.3 V; internally connected to Vreg(3.3)
Vpu(3.3)
15
13
-
SOFTCON
16
14
I
software controlled USB connection input; a HIGH level applies 3.3 V to pin Vpu(3.3), which is connected to an external 1.5 k pull-up resistor; this allows USB connect or disconnect signalling to be controlled by software input pad; push pull; CMOS ground supply; down bonded to the exposed die pad (heatsink); to be connected to the PCB ground
GND
exposed die pad
exposed die pad
-
[1]
Symbol names with an overscore (e.g. OE) indicate active LOW signals.
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Product data
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ISP1102
Advanced USB transceiver
7. Functional description
7.1 Function selection
Table 3: L Function table D+, D- driving/ receiving RCV active VP/VPO VM/VMO Function L VPO input VMO input normal driving (differential receiver active) VP output VM output receiving VPO input VMO input driving during suspend (differential receiver inactive) VP output VM output low-power state SUSPND OE
L H
H L
receiving[1] active driving inactive[2]
H
[1] [2]
H
high-Z[1]
inactive[2]
Signal levels on the D+ and D- pins are determined by other USB devices and external pull-up or pull-down resistors. In the suspend mode (SUSPND = HIGH), the differential receiver is inactive and the output RCV is always LOW. Out-of-suspend (K) signalling is detected via the single-ended receivers VP/VPO and VM/VMO.
7.2 Operating functions
Table 4: VM/VMO L L H H Table 5: D+, D- differential logic 0 differential logic 1 SE0
[1]
Driving function using differential input data interface (pin OE = L) VP/VPO L H L H Data SE0 differential logic 1 differential logic 0 illegal state
Receiving function (pin OE = H) RCV L H RCV*[1] VP/VPO L H L VM/VMO H L L
RCV* denotes the signal level on output RCV just before the SE0 state occurs. This level is stable during the SE0 period.
7.3 Power supply configurations
The ISP1102 can be used with different power supply configurations, which can be changed dynamically. Table 7 provides an overview of the power supply configurations. Normal mode -- VCC(I/O) is connected. VCC(5.0) is connected only, or VCC(5.0) and Vreg(3.3) are connected. For 5 V operation, VCC(5.0) is connected to a 5 V source (4.0 to 5.5 V). The internal voltage regulator then produces 3.3 V for the USB connections.
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ISP1102
Advanced USB transceiver
For 3.3 V operation, both VCC(5.0) and Vreg(3.3) are connected to a 3.3 V source (3.0 to 3.6 V). VCC(I/O) is independently connected to a voltage source (1.65 to 3.6 V), depending on the supply voltage of the external circuit. Sharing mode -- VCC(I/O) is connected only; VCC(5.0) and Vreg(3.3) are not connected. In this mode, the D+ and D- pins are made three-state and the ISP1102 allows external signals of up to 3.6 V to share the D+ and D- lines. The internal circuits of the ISP1102 ensure that virtually no current (maximum 10 A) is drawn via the D+ and D- lines. The power consumption through pin VCC(I/O) drops to the low-power (suspended) state level. Pins VBUSDET and RCV are driven LOW to indicate this mode. The VBUSDET function is ignored during the suspend mode of the ISP1102. Some hysteresis is built into the detection of Vreg(3.3) lost.
Table 6: Pin VCC(5.0) Vreg(3.3) VCC(I/O) Vpu(3.3) D+, D- VP/VPO, RCV VBUSDET OE, SUSPND, SOFTCON
[1] VP/VPO and VM/VMO are bidirectional pins.
Pin states in the sharing mode Sharing mode not present not present 1.65 to 3.6 V input high impedance (off) high impedance VM/VMO[1] L L L high impedance
Table 7: VCC(5.0) connected
Power supply configuration overview Configuration normal mode sharing mode Special characteristics D+, D- and Vpu(3.3) high impedance; VBUSDET driven LOW
not connected
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ISP1102
Advanced USB transceiver
7.4 Power supply input options
The ISP1102 has two power supply input options. Internal regulator -- pin VCC(5.0) is connected to 4.0 to 5.5 V. The internal regulator is used to supply the internal circuitry with 3.3 V (nominal). The Vreg(3.3) pin becomes a 3.3 V output reference. Regulator bypass -- pins VCC(5.0) and Vreg(3.3) are connected to the same supply. The internal regulator is bypassed and the internal circuitry is supplied directly from pin Vreg(3.3). The voltage range is 3.0 to 3.6 V to comply with the USB specification. The supply voltage range for each input option is specified in Table 8.
Table 8: Internal regulator Regulator bypass Power supply input options Vreg(3.3) VCC(I/O) supply input for internal regulator (4.0 to 5.5 V) connected to Vreg(3.3) with maximum voltage drop of 0.3 V (2.7 to 3.6 V) voltage reference output supply input for digital (3.3 V, 300 A) I/O pins (1.65 V to 3.6 V) supply input (3.0 V to 3.6 V) supply input for digital I/O pins (1.65 V to 3.6 V)
Input option VCC(5.0)
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ISP1102
Advanced USB transceiver
8. Electrostatic discharge (ESD)
8.1 ESD protection
For HBCC package, the pins that are connected to the USB connector (D+, D-, VCC(5.0) and GND) have a minimum of 12 kV ESD protection. The 12 kV measurement is limited by the test equipment. Capacitors of 4.7 F connected from Vreg(3.3) to GND and VCC(5.0) to GND are required to achieve this 12 kV ESD protection (see Figure 4). The ISP1102W can withstand 12 kV using the Human Body Model and 5 kV using the Contact Discharge Method as specified in IEC 61000-4-2.
R C 1 M charge current limit resistor
RD 1500 discharge resistance A DEVICE UNDER TEST VCC(5.0) Vreg(3.3)
HIGH VOLTAGE DC SOURCE CS 100 pF storage capacitor
B 4.7 F
4.7 F
GND
004aaa145
Fig 4. Human Body ESD test model.
Note: For HVQFN package, the pins that are connected to the USB connector (D+, D-, VCC(5.0) and GND) have a minimum of 7 kV ESD protection.
8.2 ESD test conditions
A detailed report on test set-up and results is available on request.
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ISP1102
Advanced USB transceiver
9. Limiting values
Table 9: Absolute maximum ratings In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC(5.0) VCC(I/O) VI Ilu Vesd Parameter supply voltage I/O supply voltage DC input voltage latch-up current electrostatic discharge voltage VI = -1.8 to +5.4 V pins D+, D-, VCC(5.0) and GND; ILI < 3 A for HBCC package pins D+, D-, VCC(5.0) and GND; ILI < 3 A for HVQFN package all other pins; ILI < 1 A Tstg
[1] [2]
[1][2]
Conditions
Min -0.5 -0.5 -0.5 -12000
Max +6.0 +4.6 100 +12000
Unit V V mA V
VCC(I/O) + 0.5 V
[2]
-7000
+7000
V
[2]
-2000 -40
+2000 +125
V C
storage temperature
Testing equipment limits measurement to only 12 kV. Capacitors needed on VCC(5.0) and Vreg(3.3) (see Section 8). Equivalent to discharging a 100 pF capacitor via a 1.5 k resistor (Human Body Model).
10. Recommended operating conditions
Table 10: Symbol VCC(5.0) VCC(I/O) VI VI(AI/O) Tamb Recommended operating conditions Parameter supply voltage I/O supply voltage input voltage input voltage on AI/O pins ambient temperature pins D+ and D- Conditions Min 4.0 1.65 0 0 -40 Typ 5.0 Max 5.5 3.6 VCC(I/O) 3.6 +85 Unit V V V V C
11. Static characteristics
Table 11: Static characteristics: supply pins VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; see Table 8 for valid voltage level combinations; Tamb = -40 to +85 C; unless otherwise specified. Symbol Vreg(3.3) ICC Parameter regulated supply voltage output operating supply current Conditions internal regulator option; Iload 300 A transmitting and receiving at 12 Mbit/s; CL = 50 pF on pins D+ and D- transmitting and receiving at 12 Mbit/s idle: VD+ > 2.7 V, VD- < 0.3 V; SE0: VD+ < 0.3 V, VD- < 0.3 V idle, SE0 or suspend
[1][2]
Min 3.0 -
Typ 3.3 4
Max 3.6 8
Unit V mA
[3]
ICC(I/O) ICC(idle) ICC(I/O)(static)
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operating I/O supply current supply current during full-speed idle and SE0 static I/O supply current
[3]
-
1 -
2 300 20
mA A A
[4]
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Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
Table 11: Static characteristics: supply pins...continued VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; see Table 8 for valid voltage level combinations; Tamb = -40 to +85 C; unless otherwise specified. Symbol ICC(susp) IDx(sharing) Parameter suspend supply current sharing mode load current on pins D+ and D- supply voltage detection threshold Conditions SUSPND = HIGH VCC(5.0) not connected; SOFTCON = LOW; VDx = 3.6 V 1.65 V VCC(I/O) 3.6 V supply lost supply present VCC(5.0)hys VCC(I/O)th supply voltage detection hysteresis I/O supply voltage detection threshold VCC(I/O) = 1.8 V Vreg(3.3) = 2.7 to 3.6 V supply lost supply present VCC(I/O)hys Vreg(3.3)th I/O supply voltage detection hysteresis regulated supply voltage detection threshold Vreg(3.3) = 3.3 V 1.65 V VCC(I/O) Vreg(3.3); 2.7 V Vreg(3.3) 3.6 V supply lost supply present Vreg(3.3)hys regulated supply voltage detection hysteresis VCC(I/O) = 1.8 V
[5] [4]
Min -
Typ -
Max 20 20 10
Unit A A A
ICC(I/O)(sharing) sharing mode I/O supply current VCC(5.0) not connected
VCC(5.0)th
4.1 -
70
3.6 -
V V mV
1.4 -
0.45
0.5 -
V V V
2.4 -
0.45
0.8 -
V V V
[1] [2] [3] [4] [5]
Iload includes the pull-up resistor current via pin Vpu(3.3). The minimum voltage is 2.7 V in the suspend mode. Maximum value characterized only, not tested in production. Excluding any load current and Vpu(3.3) or Vsw source current to the 1.5 k and 15 k pull-up and pull-down resistors (200 A typ.). When VCC(I/O) < 2.7 V, the minimum value for Vreg(3.3)th = 2.0 V for supply present condition.
Table 12: Static characteristics: digital pins VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA Leakage current ILI input leakage current
[1]
Parameter
Conditions
Min
Typ
Max
Unit
VCC(I/O) = 1.65 to 3.6 V LOW-level input voltage HIGH-level input voltage 0.6VCC(I/O) VCC(I/O) - 0.4 -1 0.3VCC(I/O) 0.15 0.4 +1 V V V V V V A
VCC(I/O) - 0.15 -
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ISP1102
Advanced USB transceiver
Table 12: Static characteristics: digital pins...continued VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Capacitance CIN Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA Example 2: VCC(I/O) = 2.5 V 0.2 V Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA Example 3: VCC(I/O) = 3.3 V 0.3 V Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA
[1]
Parameter input capacitance
Conditions pin to GND
Min -
Typ -
Max 10
Unit pF
Example 1: VCC(I/O) = 1.8 V 0.15 V LOW-level input voltage HIGH-level input voltage 1.2 1.5 1.25 0.5 0.15 0.4 V V V V V V
LOW-level input voltage HIGH-level input voltage
1.7 2.15 1.9
-
0.7 0.15 0.4 -
V V V V V V
LOW-level input voltage HIGH-level input voltage
2.15 2.85 2.6
-
0.9 0.15 0.4 -
V V V V V V
If VCC(I/O) Vreg(3.3), then the leakage current will be higher than the specified value.
Table 13: Static characteristics: analog I/O pins D+ and D- VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels Differential receiver VDI VCM differential input sensitivity differential common mode voltage |VI(D+) - VI(D-)| includes VDI range 0.2 0.8 2.5 V V Parameter Conditions Min Typ Max Unit
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ISP1102
Advanced USB transceiver
Table 13: Static characteristics: analog I/O pins D+ and D-...continued VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol VIL VIH Vhys Output levels VOL VOH ILZ Capacitance CIN Resistance ZDRV ZINP RSW Termination VTERM termination voltage for upstream port pull-up (Rpu)
[3][4]
Parameter LOW-level input voltage HIGH-level input voltage hysteresis voltage LOW-level output voltage HIGH-level output voltage OFF-state leakage current transceiver capacitance driver output impedance input impedance internal switch resistance at pin Vpu(3.3)
Conditions
Min 2.0 0.4
Typ 39 -
Max 0.8 0.7 0.3 3.6 +1 20 44 10
Unit V V V V V A pF M
Single-ended receiver
RL = 1.5 k to 3.6 V RL = 15 k to GND
[1]
2.8 -1
Leakage current
pin to GND steady-state drive
[2]
34 10 -
3.0
-
3.6
V
[1] [2] [3] [4]
VOH(min) = Vreg(3.3) - 0.2 V. Includes external resistors of 33 1% on both pins D+ and D-. This voltage is available at pins Vreg(3.3) and Vpu(3.3). The minimum voltage is 2.7 V in the suspend mode.
12. Dynamic characteristics
Table 14: Dynamic characteristics: analog I/O pins D+ and D- VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; see Table 8 for valid voltage level combinations; Tamb = -40 to +85 C; unless otherwise specified. Symbol tFR Parameter rise time Conditions CL = 50 to 125 pF; 10% to 90% of |VOH - VOL|; see Figure 5 CL = 50 to 125 pF; 90% to 10% of |VOH - VOL|; see Figure 5 excluding the first transition from Idle state excluding the first transition from Idle state; see Figure 6
[1]
Min 4
Typ -
Max 20
Unit ns
Driver characteristics
tFF
fall time
4
-
20
ns
FRFM VCRS
differential rise/fall time matching (tFR/tFF) output signal crossover voltage
90 1.3
-
111.1 2.0
% V
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Advanced USB transceiver
Table 14: Dynamic characteristics: analog I/O pins D+ and D-...continued VCC(5.0) = 4.0 to 5.5 V or Vreg(3.3) = 3.0 to 3.6 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; see Table 8 for valid voltage level combinations; Tamb = -40 to +85 C; unless otherwise specified. Symbol Driver timing tPLH(drv) tPHL(drv) tPHZ tPLZ tPZH tPZL driver propagation delay (VPO, VMO to D+, D-) driver propagation delay (VPO, VMO to D+, D-) driver disable delay (OE to D+, D-) driver disable delay (OE to D+, D-) driver enable delay (OE to D+, D-) driver enable delay (OE to D+, D-) LOW-to-HIGH; see Figure 6 and Figure 9 HIGH-to-LOW; see Figure 6 and Figure 9 HIGH-to-OFF; see Figure 7 and Figure 10 LOW-to-OFF; see Figure 7 and Figure 10 OFF-to-HIGH; see Figure 7 and Figure 10 OFF-to-LOW; see Figure 7 and Figure 10 18 18 15 15 15 15 ns ns ns ns ns ns Parameter Conditions Min Typ Max Unit
Receiver timings Differential receiver tPLH(rcv) tPHL(rcv) propagation delay (D+, D- to RCV) propagation delay (D+, D- to RCV) propagation delay (D+, D- to VP/VPO, VM/VMO) propagation delay (D+, D- to VP/VPO, VM/VMO) LOW-to-HIGH; see Figure 8 and Figure 11 HIGH-to-LOW; see Figure 8 and Figure 11 LOW-to-HIGH; see Figure 8 and Figure 11 HIGH-to-LOW; see Figure 8 and Figure 11 15 15 ns ns
Single-ended receiver tPLH(se) 18 ns
tPHL(se)
-
-
18
ns
[1]
Characterized only, not tested. Limits guaranteed by design.
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Advanced USB transceiver
1.65 V logic input 0.9 V 0.9 V
t FR, t LR VOH 90 % 90 %
t FF, t LF
0V t PLH(drv) VOH differential data lines VCRS VCRS t PHL(drv)
10 % VOL
10 %
MGS963
VOL
MGS964
Fig 5. Rise and fall times.
Fig 6. Timing of VPO and VMO to D+ and D-.
2.0 V
1.65 V logic input 0V t PZH t PZL VOH differential data lines VOL VCRS VOL +0.3 V
MGS966
0.9 V
0.9 V
differential data lines 0.8 V
VCRS
VCRS
t PHZ t PLZ VOH -0.3 V
t PLH(rcv) t PLH(se) VOH logic output VOL 0.9 V
t PHL(rcv) t PHL(se)
0.9 V
MGS965
Fig 7. Timing of OE to D+ and D-.
Fig 8. Timing of D+ and D- to RCV, VP/VPO and VM/VMO.
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ISP1102
Advanced USB transceiver
13. Test information
Vpu(3.3) D.U.T. D+/D- 33
004aaa037
1.5 k
test point
CL
15 k
Load capacitance CL = 50 pF (minimum or maximum timing)
Fig 9. Load on pins D+ and D-.
test point 33 D.U.T. 50 pF V
MBL142
500
V = 0 V for tPZH and tPHZ V = Vreg(3.3) for tPZL and tPLZ
Fig 10. Load on pins D+ and D- for enable and disable times.
test point D.U.T. 25 pF
MGS968
Fig 11. Load on pins VM/VMO, VP/VPO and RCV.
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Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
14. Package outline
HBCC16: plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm SOT639-2
b D B A f terminal 1 index area E
vMCAB wMC vMCAB wMC
b1
b3
vMCAB wMC
b2 detail X
vMCAB wMC
e1 Dh e 5 9 y1 C
C y
e e4 1/2 e4 Eh e2
1 16 1/2 e3 e3
13 X A2 A A1
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 0.8 A1 0.10 0.05 A2 0.7 0.6 b 0.33 0.27 b1 0.33 0.27 b2 0.38 0.32 b3 0.38 0.32 D 3.1 2.9 Dh 1.45 1.35 E 3.1 2.9 Eh 1.45 1.35 e 0.5 e1 2.5 e2 2.5 e3 2.45 e4 2.45 f 0.23 0.17 v 0.08 w 0.1 y 0.05 y1 0.2
OUTLINE VERSION SOT639-2
REFERENCES IEC JEDEC MO-217 JEITA
EUROPEAN PROJECTION
ISSUE DATE 01-11-13 03-03-12
Fig 12. Package outline HBCC16.
9397 750 11228
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 -- 02 September 2003
16 of 23
Philips Semiconductors
ISP1102
Advanced USB transceiver
HVQFN14: plastic thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 2.5 x 0.85 mm
SOT773-1
D
B
A
terminal 1 index area E
A A1 c
detail X
e1 b
1/2
e 7
vMCAB wMC y1 C
C y
e 4 L 8 e Eh 1 e2
3
10
terminal 1 index area
14 Dh
11 X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 2.6 2.4 Dh 1.45 1.15 E (1) 2.6 2.4 Eh 1.45 1.15 e 0.5 e1 1.5 e2 1 L 0.35 0.25 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT773-1 REFERENCES IEC --JEDEC --JEITA --EUROPEAN PROJECTION ISSUE DATE 02-07-05
Fig 13. Package outline HVQFN14.
9397 750 11228 (c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
15. Packaging
The ISP1102W (HBCC16 package) is delivered on a Type A carrier tape, see Figure 14. The tape dimensions are given in Table 15. The reel diameter is 330 mm. The reel is made of polystyrene (PS) and is not designed for use in a baking process. The cumulative tolerance of 10 successive sprocket holes is 0.02 mm. The camber must not exceed 1 mm in 100 mm.
idth
4
A0
K0
W
B0
P1 Type A direction of feed
4
A0
K0
W
B0
elongated sprocket hole Type B
P1 direction of feed
MLC338
Fig 14. Carrier tape dimensions. Table 15: A0 B0 K0 P1 W Type A carrier tape dimensions for the ISP1102W Value 3.3 3.3 1.1 8.0 12.0 0.3 Unit mm mm mm mm mm
Dimension
16. Soldering
16.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011).
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Product data
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Philips Semiconductors
ISP1102
Advanced USB transceiver
There is no soldering method that is ideal for all IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. In these situations reflow soldering is recommended.
16.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 220 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA and SSOP-T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 235 C (SnPb process) or below 260 C (Pb-free process) for packages with
a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
16.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
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Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
16.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
16.5 Package related soldering information
Table 16: Package[1] BGA, LBGA, LFBGA, SQFP, SSOP-T[3], TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP PMFP[8]
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable[4] Reflow[2] suitable suitable
suitable not not recommended[5][6] recommended[7]
suitable suitable suitable not suitable
not suitable
[3]
[4]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface.
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Product data
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Philips Semiconductors
ISP1102
Advanced USB transceiver
If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] [6] [7] [8]
17. Revision history
Table 17: Rev Date 03 20030902 Revision history CPCN Description Product data (9397 750 11228) Modifications:
* * * * * * *
02 01 20030106 20000524 -
Added HVQFN14 package information Section 2: updated Added pad details to Table 2 Section 7.3: updated the first line under Normal mode Table 6: added a table note Section 8.1: updated the first paragraph and added a note Table 9: updated info on Vesd and added a table note.
Product data (9397 750 10397) Objective data
9397 750 11228
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Product data
Rev. 03 -- 02 September 2003
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Philips Semiconductors
ISP1102
Advanced USB transceiver
18. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
20. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 11228
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
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Philips Semiconductors
ISP1102
Advanced USB transceiver
Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 8 8.1 8.2 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 16.5 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 Function selection. . . . . . . . . . . . . . . . . . . . . . . 5 Operating functions. . . . . . . . . . . . . . . . . . . . . . 5 Power supply configurations . . . . . . . . . . . . . . . 5 Power supply input options . . . . . . . . . . . . . . . . 7 Electrostatic discharge (ESD). . . . . . . . . . . . . . 8 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . 8 ESD test conditions . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 Recommended operating conditions. . . . . . . . 9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 9 Dynamic characteristics . . . . . . . . . . . . . . . . . 12 Test information . . . . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 19 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 20 Package related soldering information . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
(c) Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 02 September 2003 Document order number: 9397 750 11228


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